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Proposer
Hans Wolfgang Loidl
Title
The RISC-V architecture
Goal
Provide a programmer-oriented overview of the RISC-V architecture
Description
The RISC-V architecture is a new, open-hardware computer architecture that is increasingly popular and becoming a competitior to established architectures, e.g. ARM. It provides advantages in terms of modularity, flexibility, and open design. The main task in this master class is to give an overview of the main characteristics of this new architecture, mainly for programmers (rather than electrical engineers). This should also critical reflect on advantages and disadvantages. The practical part of the master class should provide some simple programming exercise that elaborates on the differences in architecture: this could use RISC-V vs ARM assembler.
Resources
Emulator for RISC-V should be sufficient; optionally, a RISC-V board (eg. HiFive2)
Background
Good knowledge of computer architecture and low-level programming issues
Url
External Link
Difficulty Level
High
Ethical Approval
None
Number Of Students
1
Supervisor
Hans Wolfgang Loidl
Keywords
computer architecture
Degrees
Master of Engineering in Software Engineering
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